Journal: Nature Communications
Article Title: Integrated photonic encoder for low power and high-speed image processing
doi: 10.1038/s41467-024-48099-2
Figure Lengend Snippet: Comparison of energy consumption (given by Energy/MAC) as a function of number of inputs pixels N for encoding via matrix multiplication using electronic approaches such as GPU, SoC, or ASIC-based (black solid line with a red band) and the presented optical approach using a photonic encoder with average transmission \documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$${T}_{{scatter}}=20\%$$\end{document} T s c a t t e r = 20 % (blue solid line). For the electronic approaches, typical energy efficiency of these digital accelerators is on the order of ~1 pJ/MAC and the red band shows the range of values for different accelerators. For the photonic approach, different color-coded lines correspond to the different components contributing to the total energy consumption such as the laser (dashed red line), modulators (dashed yellow lines), and detectors (dashed magenta line). The vertical gray line corresponds to energy consumption values for an 8 × 8 kernel or a 64-input pixel block. The energy consumption is dominated by the input laser and the overall energy efficiency of the presented optical approach improves as N or number of input pixels increases.
Article Snippet: These SoCs typically include ARM cores for general-purpose computing, memory interface, and device control, along with specifically designed hardware codecs (e.g., JPEG/HEIF encoder in Canon DIGIC) or image-processing ASIC (e.g., Apple A16 Bionic) for JPEG compression and decoding.
Techniques: Comparison, Transmission Assay, Blocking Assay