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Vivado block design—CNN IP integration on the Zynq-7000 (Processing System + CNN accelerator via AXI Interconnect).

Journal: Sensors (Basel, Switzerland)

Article Title: Multi-Chaotic HEOA for Hardware-Aware Neural Architecture Search: Brain Tumor Classification on FPGA

doi: 10.3390/s26092822

Figure Lengend Snippet: Vivado block design—CNN IP integration on the Zynq-7000 (Processing System + CNN accelerator via AXI Interconnect).

Article Snippet: The IP block generated by Vivado HLS was integrated into a complete system design on the Zynq-7000 platform using Vivado IP Integrator (Xilinx, San Jose, CA, USA). illustrates the system block design, comprising the Zynq-7000 Processing System (PS), the custom CNN IP ( brain_tumor_cnn_0 ), the AXI Interconnect, and the interrupt management module ensuring bidirectional communication between the ARM processor and the FPGA hardware accelerator.

Techniques: Blocking Assay