virtual source (vs) model (COMSOL Inc)
90
Structured Review
COMSOL Inc
virtual source (vs) model
Virtual Source (Vs) Model, supplied by COMSOL Inc, used in various techniques. Bioz Stars score: 90/100, based on 1 PubMed citations. ZERO BIAS - scores, article reviews, protocol conditions and more
https://www.bioz.com/product/virtual+model/virtual+source++vs++model/pmc06673702-93-26-47
Average 90 stars, based on 1 article reviews
Virtual Source (Vs) Model, supplied by COMSOL Inc, used in various techniques. Bioz Stars score: 90/100, based on 1 PubMed citations. ZERO BIAS - scores, article reviews, protocol conditions and more
https://www.bioz.com/product/virtual+model/virtual+source++vs++model/pmc06673702-93-26-47
Average 90 stars, based on 1 article reviews
virtual source (vs) model - by Bioz Stars,
2026-09
90/100 stars
Images
1) Product Images from "A biomimetic 2D transistor for audiomorphic computing"
Article Title: A biomimetic 2D transistor for audiomorphic computing
Journal: Nature Communications
doi: 10.1038/s41467-019-11381-9
Figure Legend Snippet: Artificial coincidence detector neuron. a Schematic and ( b ) Transfer characteristics of a fully top-gated MoS 2 field effect transistor (FET) with 120 nm of hydrogen silsesquioxane (HSQ) as the top-gate dielectric and Ni/Au as the top-gate electrode. MoS 2 channel is few nm thick and is connected to Ni/Au metal contacts that serve as the source/drain terminals. The device is normally ON at V TG = 0 V and can be switched OFF by applying V TG = −30 V with a high current ON/OFF ratio of ~10 6 . c Truth table showing that the device can be regarded as a one-input-one-output digital element. d Schematic of an MoS 2 FET with two split-gates separated by an ungated region of width W UG = 200 nm. e Transfer characteristics of the split-gated device when one of the split-gates is swept from 0 V to −30 V while the other split-gate is held at a constant bias of 0 V (red curve) and when both split-gates are simultaneously swept from 0 V to −30 V (blue curve). f Truth table showing that the split-gated device can be treated as two-input-one-output digital element with NAND logic. g Random sequence of voltage pulses of magnitude −30 V are applied to the two spilt gates, V SG1 and V SG2 . The output current is completely suppressed or inhibited only when the spikes coincide suggesting that the split-gated MoS 2 FET can be used to mimic neural coincidence. h COMSOL multiphysics simulation of the 2D potential profile when −30 V bias is applied to either one or both split-gates. i 1D potential profile along the channel width for different combinations of the two split-gate biases shows the effect of fringing electric field and capacitive coupling between the two split-gate electrodes. The channel potential in the ungated region between the split-gates is finite under all conditions. The effect is more dramatic when V SG1 = V SG2 = −30 V. j Simulated transfer characteristics of the split-gated MoS 2 FET using the Virtual Source (VS) model and the electrostatic potential profile, V CH ( x ) along the channel width obtained from the COMSOL simulations. We have used a modified VS model to calculate channel resistance, R CH that captures the variation in the electrostatic potential along the width of the channel and also to account for the access resistance, R A due to the ungated region along the channel length
Techniques Used: Sequencing, Modification