primitive block Search Results


credit blocked primitive  (SAS institute)
90
SAS institute credit blocked primitive
Credit Blocked Primitive, supplied by SAS institute, used in various techniques. Bioz Stars score: 90/100, based on 1 PubMed citations. ZERO BIAS - scores, article reviews, protocol conditions and more
https://www.bioz.com/result/credit blocked primitive/product/SAS institute
Average 90 stars, based on 1 article reviews
credit blocked primitive - by Bioz Stars, 2026-04
90/100 stars
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primitive building blocks such as cylinders, spheres, and blocks  (COMSOL Inc)
90
COMSOL Inc primitive building blocks such as cylinders, spheres, and blocks
Primitive Building Blocks Such As Cylinders, Spheres, And Blocks, supplied by COMSOL Inc, used in various techniques. Bioz Stars score: 90/100, based on 1 PubMed citations. ZERO BIAS - scores, article reviews, protocol conditions and more
https://www.bioz.com/result/primitive building blocks such as cylinders, spheres, and blocks/product/COMSOL Inc
Average 90 stars, based on 1 article reviews
primitive building blocks such as cylinders, spheres, and blocks - by Bioz Stars, 2026-04
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4kb basic fpga block ram primitive memories  (Xilinx Inc)
90
Xilinx Inc 4kb basic fpga block ram primitive memories
Resource usage and maximum working frequency of different modules (description in text).
4kb Basic Fpga Block Ram Primitive Memories, supplied by Xilinx Inc, used in various techniques. Bioz Stars score: 90/100, based on 1 PubMed citations. ZERO BIAS - scores, article reviews, protocol conditions and more
https://www.bioz.com/result/4kb basic fpga block ram primitive memories/product/Xilinx Inc
Average 90 stars, based on 1 article reviews
4kb basic fpga block ram primitive memories - by Bioz Stars, 2026-04
90/100 stars
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fpga primitive function block carry  (Xilinx Inc)
90
Xilinx Inc fpga primitive function block carry
Resource usage and maximum working frequency of different modules (description in text).
Fpga Primitive Function Block Carry, supplied by Xilinx Inc, used in various techniques. Bioz Stars score: 90/100, based on 1 PubMed citations. ZERO BIAS - scores, article reviews, protocol conditions and more
https://www.bioz.com/result/fpga primitive function block carry/product/Xilinx Inc
Average 90 stars, based on 1 article reviews
fpga primitive function block carry - by Bioz Stars, 2026-04
90/100 stars
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Image Search Results


Resource usage and maximum working frequency of different modules (description in text).

Journal: Sensors (Basel, Switzerland)

Article Title: Efficient Hardware Implementation of the Horn-Schunck Algorithm for High-Resolution Real-Time Dense Optical Flow Sensor

doi: 10.3390/s140202860

Figure Lengend Snippet: Resource usage and maximum working frequency of different modules (description in text).

Article Snippet: The standard abbreviations for resources available in Xilinx FPGA devices are used: FF — flip-flops or registers, LUT 6 — look-up table with six inputs and one output, SLICE — slice cells of FPGA, BRAM 18 and 36 — the 2kB or 4kB basic FPGA Block RAM primitive memories, DSP48 - hardware digital signal processing blocks.

Techniques:

Processing times in milliseconds for Core i7 2600K 3.4 GHz processor and hardware implementations in Virtex 7 XC7VX980T device.

Journal: Sensors (Basel, Switzerland)

Article Title: Efficient Hardware Implementation of the Horn-Schunck Algorithm for High-Resolution Real-Time Dense Optical Flow Sensor

doi: 10.3390/s140202860

Figure Lengend Snippet: Processing times in milliseconds for Core i7 2600K 3.4 GHz processor and hardware implementations in Virtex 7 XC7VX980T device.

Article Snippet: The standard abbreviations for resources available in Xilinx FPGA devices are used: FF — flip-flops or registers, LUT 6 — look-up table with six inputs and one output, SLICE — slice cells of FPGA, BRAM 18 and 36 — the 2kB or 4kB basic FPGA Block RAM primitive memories, DSP48 - hardware digital signal processing blocks.

Techniques:

Working system. Camera, FPGA evaluation board and LCD monitor displaying the result. ( Left ), optical flow obtained for poster tube rotation. ( Right ), person waving hands in opposite directions.

Journal: Sensors (Basel, Switzerland)

Article Title: Efficient Hardware Implementation of the Horn-Schunck Algorithm for High-Resolution Real-Time Dense Optical Flow Sensor

doi: 10.3390/s140202860

Figure Lengend Snippet: Working system. Camera, FPGA evaluation board and LCD monitor displaying the result. ( Left ), optical flow obtained for poster tube rotation. ( Right ), person waving hands in opposite directions.

Article Snippet: The standard abbreviations for resources available in Xilinx FPGA devices are used: FF — flip-flops or registers, LUT 6 — look-up table with six inputs and one output, SLICE — slice cells of FPGA, BRAM 18 and 36 — the 2kB or 4kB basic FPGA Block RAM primitive memories, DSP48 - hardware digital signal processing blocks.

Techniques: